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- 1. Microelectron. Reliability 46, 1 (2006) , “NBTI degradation: From physical mechanisms to modelling”,An overview of the evolution of transistor parameters under negative bias temperature instability stress conditions commonly observed in p-MOSFETs in recent technologies is presented. The physical mechanisms of the degradation as well as the different defects involved have been discussed according to a systematic set of experiments with different stress conditions. According to our findings, a physical model is proposed which could be used to more accurately predict the transistor degradation. Finally, based on our new present understanding, a new characterization methodology is proposed, which would open the way to a more accurate determination of parameter shifts and thus allowing implementing the degradation into design rules. (Read more)
- 2. Microelectron. Reliability 45, 71 (2005) , “A comprehensive model of PMOS NBTI degradation ”,Negative bias temperature instability has become an important reliability concern for ultra-scaled Silicon IC technology with significant implications for both analog and digital circuit design. In this paper, we construct a comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model. We demonstrate how to solve the reaction–diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work. We also augment this basic reaction–diffusion model by including the temperature and field-dependence of the NBTI phenomena so that reliability projections can be made under arbitrary circuit operating conditions. (Read more)
- 3. J. Appl. Phys. 94, 1 (2003) , “Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing”,We present an overview of negative bias temperature instability (NBTI) commonly observed in p-channel metaloxidesemiconductor field-effect transistors when stressed with negative gate voltages at elevated temperatures. We discuss the results of such stress on device and circuit... (Read more)
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Updated at 2010-07-20 16:50:39
Updated at 2010-07-20 16:50:39
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